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Visibl at DAC 2026: AI-native workflows from architecture to production readiness

Visibl Semiconductors

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At a glance

Estimated reading time
3 min read
Conference dates
July 26–29, 2026
Venue
Long Beach Convention Center · California
Speaker
Jordon Kashanchi · Co-founder and CTO

Visibl Semiconductors presented at DAC 2026 in Long Beach, California. On July 27, our co-founder and CTO, Jordon Kashanchi, shared “AI-Native Workflows from Architecture to Production Readiness” in the Exhibitor Forum.

The talk explored how AI can help with the work surrounding custom ASIC development: keeping requirements, design decisions, verification evidence, and human review connected from the first specification through production handoff.

Keeping the engineering intent intact

A specification, register map, pinout, and testbench can each look reasonable while disagreeing with one another. Visibl’s workflow makes those dependencies explicit. Each requirement carries its assumptions, a named owner, a verification method, the resulting evidence, and a review gate.

That structure gives automation something concrete to check and engineers a clear basis for decisions. Unresolved questions remain visible until the evidence supports closing them.

AI assists the work leading to review. The engineering decision determines whether the gate closes or the design returns for rework.

Where AI helps in the flow

Jordon described practical uses of AI across the development process:

  • Extracting requirements and surfacing ambiguity before implementation.
  • Checking consistency across specifications, registers, pinouts, and testbenches.
  • Preparing verification plans, RTL scaffolding, simulation harnesses, and regression summaries.
  • Finding relevant process and tool documentation, then assembling evidence for engineering review.

For analog and mixed-signal work, the deck emphasized grounding proposals in process-specific device sweeps, simulation data, and layout feedback. Engineers evaluate those proposals against the process and tools used for the design.

A package constraint that changed the design

The G1 gate-driver case study showed why this matters. An assumption about bond-wire current capacity became a packaging review item. Quantifying the constraint led to a layout change before tapeout: distributing the high-current outputs across multiple pads and using parallel bond wires.

The example illustrates the value of assigning an owner and a path to evidence to an assumption that could otherwise survive unnoticed into manufacturing.

Engineering judgment stays accountable

AI helps organize and accelerate the work. Verification tools, process constraints, and qualified reviewers determine whether a design is ready to proceed. Signoff, waivers, and safety or reliability claims require evidence and an accountable engineering decision.

That discipline is central to Visibl’s approach: making the path from customer requirements to manufacturable silicon inspectable, with reusable engineering evidence that carries forward into the next program.