Visibl at Yotta 2026

Visibl Semiconductors attended Yotta 2026 at Caesars Forum in Las Vegas, September 28–30. The event brought together the AI, energy, and digital infrastructure communities to examine how the systems behind AI are built and scaled.

Seeing the system around the chip

Yotta’s program spanned compute hardware, data center design, power generation, grid interconnection, and infrastructure investment. That breadth makes it relevant to Visibl: understanding the systems around a chip helps us understand what hardware teams need from it.

The official agenda connected next-generation compute and high-density infrastructure with the energy and capital needed to support them. Our perspective within that broader conversation is focused on power electronics and the role of product-specific silicon.

Custom silicon for the hardware behind infrastructure

Visibl builds custom silicon for power electronics, combining chip-design expertise with software and automation. We’re working to make that development path accessible to hardware companies that need chips designed around their own products.

For us, the starting point is a clear product requirement: what needs to be controlled, measured, or integrated, and how that behavior fits into the wider system. Events such as Yotta provide context for the infrastructure those products will serve.

We’d welcome conversations with hardware teams working on power electronics for AI and digital infrastructure, from defining system requirements to evaluating whether custom silicon is the right fit.

Translate infrastructure goals into verifiable requirements

A facility-level goal is not yet a chip specification. The engineering work is to identify which requirements belong to the power system, which belong to a board, and which can be addressed in silicon. A useful review asks:

• Where is the limiting constraint: available power, conversion losses, cooling, control response, or physical space?
• Which measurements and interfaces are needed to observe and control that constraint?
• What evidence would demonstrate an improvement: efficiency across the load range, transient response, thermal measurements, or manufacturing cost?
• What remains outside the chip’s scope, such as utility interconnection, facility cooling, and infrastructure financing?